Intro
As part of an upgrade to the detectors in the LHC particle accelerator, new electronic components had to be tested for radiation tolerance. CERN was using a standard testing setup. For every individual component to be tested, a small interface was needed.
Description
As a 2 months student project, my design was a very simple interface to translate between the standard test system and the particular device under test (in this case a RAM memory).
Both the design and the testbench where written in VHDL, and later implemented in an FPGA board. I also implemented some MatLab functions to interpret the data obtained from the test.
